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Fix unplugged controller memory writes, add some missing math routines, and slightly weaken DMA alignment requirements (#117)
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--------- Co-authored-by: LittleCube <littlecubehax@gmail.com>
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3 changed files with 38 additions and 5 deletions
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@ -50,10 +50,12 @@ extern "C" void osContGetReadData_recomp(uint8_t* rdram, recomp_context* ctx) {
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osContGetReadData(dummy_data);
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for (int controller = 0; controller < MAXCONTROLLERS; controller++) {
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MEM_H(6 * controller + 0, data) = dummy_data[controller].button;
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MEM_B(6 * controller + 2, data) = dummy_data[controller].stick_x;
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MEM_B(6 * controller + 3, data) = dummy_data[controller].stick_y;
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MEM_B(6 * controller + 4, data) = dummy_data[controller].err_no;
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if (dummy_data[controller].err_no == 0) {
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MEM_H(6 * controller + 0, data) = dummy_data[controller].button;
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MEM_B(6 * controller + 2, data) = dummy_data[controller].stick_x;
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MEM_B(6 * controller + 3, data) = dummy_data[controller].stick_y;
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MEM_B(6 * controller + 4, data) = dummy_data[controller].err_no;
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}
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}
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}
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@ -80,3 +80,35 @@ extern "C" void __ull_to_f_recomp(uint8_t * rdram, recomp_context * ctx) {
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ctx->f0.fl = ret;
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}
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extern "C" void __ull_rshift_recomp(uint8_t * rdram, recomp_context * ctx) {
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uint64_t a = (ctx->r4 << 32) | ((ctx->r5 << 0) & 0xFFFFFFFFu);
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uint64_t b = (ctx->r6 << 32) | ((ctx->r7 << 0) & 0xFFFFFFFFu);
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uint64_t ret = a >> b;
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ctx->r2 = (int32_t)(ret >> 32);
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ctx->r3 = (int32_t)(ret >> 0);
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}
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extern "C" void __ll_to_f_recomp(uint8_t * rdram, recomp_context * ctx) {
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int64_t a = (ctx->r4 << 32) | ((ctx->r5 << 0) & 0xFFFFFFFFu);
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float ret = (float)a;
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ctx->f0.fl = ret;
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}
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extern "C" void __f_to_ll_recomp(uint8_t * rdram, recomp_context * ctx) {
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int64_t ret = (int64_t)ctx->f12.fl;
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ctx->r2 = (int32_t)(ret >> 32);
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ctx->r3 = (int32_t)(ret >> 0);
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}
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extern "C" void __ll_lshift_recomp(uint8_t * rdram, recomp_context * ctx) {
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uint64_t a = (ctx->r4 << 32) | ((ctx->r5 << 0) & 0xFFFFFFFFu);
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uint64_t b = (ctx->r6 << 32) | ((ctx->r7 << 0) & 0xFFFFFFFFu);
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uint64_t ret = a << b;
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ctx->r2 = (int32_t)(ret >> 32);
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ctx->r3 = (int32_t)(ret >> 0);
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}
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@ -67,7 +67,6 @@ void recomp::do_rom_read(uint8_t* rdram, gpr ram_address, uint32_t physical_addr
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// TODO handle misaligned DMA
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assert((physical_addr & 0x1) == 0 && "Only PI DMA from aligned ROM addresses is currently supported");
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assert((ram_address & 0x7) == 0 && "Only PI DMA to aligned RDRAM addresses is currently supported");
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assert((num_bytes & 0x1) == 0 && "Only PI DMA with aligned sizes is currently supported");
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uint8_t* rom_addr = rom.data() + physical_addr - recomp::rom_base;
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for (size_t i = 0; i < num_bytes; i++) {
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MEM_B(i, ram_address) = *rom_addr;
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