mirror of
https://github.com/N64Recomp/N64Recomp.git
synced 2025-10-30 08:02:11 +00:00
Allow zero-sized symbols in a specific range for patches, fixed cases where errors didn't terminate the recompiler
This commit is contained in:
Mr-Wiseguy
Wiseguy
parent
4161ef68cc
commit
424a509b22
1 changed files with 54 additions and 18 deletions
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@ -45,9 +45,13 @@ JalResolutionResult resolve_jal(const RecompPort::Context& context, size_t cur_s
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for (size_t target_func_index : matching_funcs_find->second) {
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const auto& target_func = context.functions[target_func_index];
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// Skip zero-sized symbols.
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// Zero-sized symbol handling. unless there's only one matching target.
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if (target_func.words.empty()) {
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continue;
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// Allow zero-sized symbols between 0x8F000000 and 0x90000000 for use with patches.
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// TODO make this configurable or come up with a more sensible solution for dealing with manual symbols for patches.
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if (target_func.vram < 0x8F000000 || target_func.vram > 0x90000000) {
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continue;
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}
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}
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// Immediately accept a function in the same section as this one, since it must also be loaded if the current function is.
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@ -218,7 +222,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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if (reloc_index + 1 < section.relocs.size() && next_vram > section.relocs[reloc_index].address) {
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next_reloc_index++;
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}
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process_instruction(context, config, func, stats, skipped_insns, instr_index + 1, instructions, output_file, false, false, link_branch_index, next_reloc_index, dummy_needs_link_branch, dummy_is_branch_likely, static_funcs_out);
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if (!process_instruction(context, config, func, stats, skipped_insns, instr_index + 1, instructions, output_file, false, false, link_branch_index, next_reloc_index, dummy_needs_link_branch, dummy_is_branch_likely, static_funcs_out)) {
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return false;
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}
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}
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print_indent();
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fmt::vprint(output_file, fmt_str, fmt::make_format_args(args...));
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@ -227,6 +233,7 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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} else {
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fmt::print(output_file, ";\n");
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}
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return true;
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};
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auto print_func_call = [reloc_target_section_offset, reloc_reference_symbol, reloc_type, &context, §ion, &func, &static_funcs_out, &needs_link_branch, &print_unconditional_branch]
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@ -292,10 +299,12 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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if (context.functions_by_vram.find(branch_target) != context.functions_by_vram.end()) {
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fmt::print(output_file, "{{\n ");
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fmt::print("Tail call in {} to 0x{:08X}\n", func.name, branch_target);
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print_func_call(branch_target, false, true);
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if (!print_func_call(branch_target, false, true)) {
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return false;
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}
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print_line(" return");
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fmt::print(output_file, " }}\n");
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return;
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return true;
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}
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fmt::print(stderr, "[Warn] Function {} is branching outside of the function (to 0x{:08X})\n", func.name, branch_target);
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@ -310,7 +319,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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if (reloc_index + 1 < section.relocs.size() && next_vram > section.relocs[reloc_index].address) {
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next_reloc_index++;
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}
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process_instruction(context, config, func, stats, skipped_insns, instr_index + 1, instructions, output_file, true, false, link_branch_index, next_reloc_index, dummy_needs_link_branch, dummy_is_branch_likely, static_funcs_out);
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if (!process_instruction(context, config, func, stats, skipped_insns, instr_index + 1, instructions, output_file, true, false, link_branch_index, next_reloc_index, dummy_needs_link_branch, dummy_is_branch_likely, static_funcs_out)) {
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return false;
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}
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}
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fmt::print(output_file, " ");
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@ -319,6 +330,7 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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fmt::print(output_file, ";\n goto after_{}", link_branch_index);
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}
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fmt::print(output_file, ";\n }}\n");
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return true;
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};
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if (indent) {
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@ -621,7 +633,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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// Branches
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case InstrId::cpu_jal:
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print_func_call(instr.getBranchVramGeneric());
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if (!print_func_call(instr.getBranchVramGeneric())) {
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return false;
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}
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break;
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case InstrId::cpu_jalr:
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// jalr can only be handled with $ra as the return address register
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@ -657,7 +671,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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// FIXME: how to deal with static functions?
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else if (context.functions_by_vram.find(branch_target) != context.functions_by_vram.end()) {
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fmt::print("Tail call in {} to 0x{:08X}\n", func.name, branch_target);
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print_func_call(branch_target, false);
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if (!print_func_call(branch_target, false)) {
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return false;
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}
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print_line("return");
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}
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else {
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@ -683,7 +699,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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if (reloc_index + 1 < section.relocs.size() && next_vram > section.relocs[reloc_index].address) {
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next_reloc_index++;
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}
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process_instruction(context, config, func, stats, skipped_insns, instr_index + 1, instructions, output_file, false, false, link_branch_index, next_reloc_index, dummy_needs_link_branch, dummy_is_branch_likely, static_funcs_out);
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if (!process_instruction(context, config, func, stats, skipped_insns, instr_index + 1, instructions, output_file, false, false, link_branch_index, next_reloc_index, dummy_needs_link_branch, dummy_is_branch_likely, static_funcs_out)) {
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return false;
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}
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print_indent();
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fmt::print(output_file, "switch (jr_addend_{:08X} >> 2) {{\n", cur_jtbl.jr_vram);
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for (size_t entry_index = 0; entry_index < cur_jtbl.entries.size(); entry_index++) {
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@ -731,7 +749,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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case InstrId::cpu_bne:
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print_indent();
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print_branch_condition("if ({}{} != {}{})", ctx_gpr_prefix(rs), rs, ctx_gpr_prefix(rt), rt);
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print_branch((uint32_t)instr.getBranchVramGeneric());
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if (!print_branch((uint32_t)instr.getBranchVramGeneric())) {
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return false;
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}
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break;
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case InstrId::cpu_beql:
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is_branch_likely = true;
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@ -739,7 +759,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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case InstrId::cpu_beq:
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print_indent();
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print_branch_condition("if ({}{} == {}{})", ctx_gpr_prefix(rs), rs, ctx_gpr_prefix(rt), rt);
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print_branch((uint32_t)instr.getBranchVramGeneric());
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if (!print_branch((uint32_t)instr.getBranchVramGeneric())) {
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return false;
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}
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break;
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case InstrId::cpu_bgezl:
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is_branch_likely = true;
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@ -747,7 +769,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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case InstrId::cpu_bgez:
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print_indent();
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print_branch_condition("if (SIGNED({}{}) >= 0)", ctx_gpr_prefix(rs), rs);
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print_branch((uint32_t)instr.getBranchVramGeneric());
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if (!print_branch((uint32_t)instr.getBranchVramGeneric())) {
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return false;
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}
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break;
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case InstrId::cpu_bgtzl:
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is_branch_likely = true;
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@ -755,7 +779,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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case InstrId::cpu_bgtz:
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print_indent();
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print_branch_condition("if (SIGNED({}{}) > 0)", ctx_gpr_prefix(rs), rs);
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print_branch((uint32_t)instr.getBranchVramGeneric());
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if (!print_branch((uint32_t)instr.getBranchVramGeneric())) {
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return false;
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}
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break;
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case InstrId::cpu_blezl:
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is_branch_likely = true;
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@ -763,7 +789,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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case InstrId::cpu_blez:
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print_indent();
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print_branch_condition("if (SIGNED({}{}) <= 0)", ctx_gpr_prefix(rs), rs);
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print_branch((uint32_t)instr.getBranchVramGeneric());
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if (!print_branch((uint32_t)instr.getBranchVramGeneric())) {
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return false;
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}
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break;
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case InstrId::cpu_bltzl:
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is_branch_likely = true;
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@ -771,7 +799,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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case InstrId::cpu_bltz:
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print_indent();
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print_branch_condition("if (SIGNED({}{}) < 0)", ctx_gpr_prefix(rs), rs);
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print_branch((uint32_t)instr.getBranchVramGeneric());
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if (!print_branch((uint32_t)instr.getBranchVramGeneric())) {
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return false;
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}
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break;
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case InstrId::cpu_break:
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print_line("do_break({})", instr_vram);
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@ -782,7 +812,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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case InstrId::cpu_bgezal:
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print_indent();
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print_branch_condition("if (SIGNED({}{}) >= 0) {{", ctx_gpr_prefix(rs), rs);
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print_func_call(instr.getBranchVramGeneric());
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if (!print_func_call(instr.getBranchVramGeneric())) {
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return false;
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}
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print_line("}}");
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break;
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@ -952,7 +984,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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case InstrId::cpu_bc1t:
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print_indent();
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print_branch_condition("if (c1cs)", ctx_gpr_prefix(rs), rs);
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print_branch((uint32_t)instr.getBranchVramGeneric());
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if (!print_branch((uint32_t)instr.getBranchVramGeneric())) {
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return false;
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}
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break;
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case InstrId::cpu_bc1fl:
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is_branch_likely = true;
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@ -960,7 +994,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::C
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case InstrId::cpu_bc1f:
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print_indent();
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print_branch_condition("if (!c1cs)", ctx_gpr_prefix(rs), rs);
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print_branch((uint32_t)instr.getBranchVramGeneric());
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if (!print_branch((uint32_t)instr.getBranchVramGeneric())) {
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return false;
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}
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break;
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// Cop1 arithmetic
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