mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-10-30 07:11:38 +00:00
Implement vcmpbfp/vcmpbfp128 - need to implement vscr saturation bit control
This commit is contained in:
parent
485ca80383
commit
e5ca0a2684
2 changed files with 12 additions and 1 deletions
|
|
@ -1876,7 +1876,11 @@ bool Recompiler::Recompile(
|
|||
|
||||
case PPC_INST_VCMPBFP:
|
||||
case PPC_INST_VCMPBFP128:
|
||||
println("\t__builtin_debugtrap();");
|
||||
printSetFlushMode(true);
|
||||
println("\t_mm_store_ps({}.f32, _mm_vcmpbfp(_mm_load_ps({}.f32), _mm_load_ps({}.f32)));",
|
||||
v(insn.operands[0]), v(insn.operands[1]), v(insn.operands[2]));
|
||||
if (strchr(insn.opcode->name, '.'))
|
||||
println("\t{}.setFromMask(_mm_load_ps({}.f32), 0xF);", cr(6), v(insn.operands[0]));
|
||||
break;
|
||||
|
||||
case PPC_INST_VCMPEQFP:
|
||||
|
|
|
|||
|
|
@ -651,4 +651,11 @@ inline __m128i _mm_vsr(__m128i a, __m128i b)
|
|||
return _mm_castps_si128(_mm_insert_ps(_mm_castsi128_ps(_mm_srl_epi64(a, b)), _mm_castsi128_ps(_mm_srl_epi64(_mm_srli_si128(a, 4), b)), 0x10));
|
||||
}
|
||||
|
||||
inline __m128 _mm_vcmpbfp(__m128 a, __m128 b)
|
||||
{
|
||||
__m128 xmm0 = _mm_and_ps(_mm_cmpgt_ps(a, b), _mm_castsi128_ps(_mm_set1_epi32(0x80000000)));
|
||||
__m128 xmm1 = _mm_and_ps(_mm_cmplt_ps(a, _mm_sub_ps(_mm_setzero_ps(), b)), _mm_castsi128_ps(_mm_set1_epi32(0x40000000)));
|
||||
return _mm_or_ps(xmm0, xmm1);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue